The most common and mature method of SiC crystal growth is physical vapor transport method (PVT). This method is a gas phase growth method with high growth temperature and high requirements for raw materials and process parameters. In recent years, a lot of time and effort have been invested in the development of PVT technology at home and abroad. Great breakthroughs and improvements have been made in the quality and size of SiC Crystals. However, there are still structural defects and micro stresses in the crystals. The existence of structural defects will worsen the performance of SiC based devices, which will affect the application of devices, while the existence of stress will make the SiC crystal easy to crack in the processing stage, thus reducing the yield of SiC wafers. Therefore, it is very important to reduce the microstructure defects and micro stress in SiC crystal, and high temperature annealing can effectively reduce the micro stress and eliminate the microstructure defects.
Annealing treatment is a method of heating materials to a certain temperature in a specific atmosphere, holding for a period of time, and then cooling at an appropriate rate. It is a very common heat treatment process in the field of materials. Annealing treatment plays an important role in the post-treatment process of intraocular lens. For example, after the growth of single crystal Si, sapphire and other crystals, corresponding annealing treatment should be carried out to eliminate the stress and defects in the crystal and improve the crystal quality.
Defects such as dislocations, microchannels, stacking faults, multi-type inclusions and inclusions often occur in SiC Crystals prepared by PVT method.
Dislocation is a kind of line defect caused by strain, the generation of dislocation will seriously affect the mechanical and electrical properties; the existence of microchannels will have a fatal impact on SiC based devices; even if there is only one microchannel in high-voltage devices, it will lead to device damage. The formation mechanism of microchannels has not yet reached a consensus and is still under study. As shown in the figure below, the dislocation corrosion pits on Si surface are shown, among which the large hexagonal corrosion pits are microtubules; the hexagonal corrosion pits with medium size are screw dislocations with hexagonal shape, the small hexagonal corrosion pits are edge dislocations, and the elliptical corrosion pits are plane dislocations.
Dislocation corrosion pits on Si surface
If the stacking order of a certain area in SiC crystal deviates from the original stacking order, there will be stacking faults. The formation of polytype inclusions is due to the overlapping of growth temperature ranges of different SiC crystal forms, and there are good crystallographic compatibility and similar free energy between polytypes. The existence of such defects will damage the structural integrity of SiC Crystals. In the process of SiC crystal growth, some larger impurity particles will form mosaic structure and inclusion defects.
On the one hand, the various defects in SiC crystal, such as the distortion between the defect structure and the surrounding normal lattice, will produce the stress field around the SiC crystal. On the other hand, the non-uniform growth of SiC crystal will also produce stress, such as the axial and radial temperature gradient in the crucible of SiC crystal growth, which leads to the inconsistent growth rate of SiC crystal surface, which makes the surface of SiC ingot present uneven shape. The existence of stress can easily cause cracking in the later processing (such as rounding, surface grinding, multi wire cutting, etc.), which greatly reduces the yield of SiC wafers.
High temperature annealing process of SiC crystal
In the process of SiC single crystal growth by PVT, many defects and stresses are inevitable. In order to improve the quality of SiC crystal and reduce the structure defects and thermal stress, it is necessary to conduct high temperature annealing treatment on SiC crystal. The process can be divided into three processes: heating, heat preservation and cooling. Due to the high temperature resistance of SiC crystal, in order to reduce the thermal stress to the maximum extent, the annealing temperature of the wafer is relatively high, generally around 1800 ℃.
Wafer annealing process
The high temperature vacuum horizontal annealing furnace independently developed by Haoyue electric furnace consists of high temperature reaction system, heating system, vacuum system and control system. The heating system adopts graphite heating, the rated power can reach 60kW, and the maximum working temperature is 2300 ℃. It can keep the temperature field uniform and constant in a wide range of working area in the cavity during the heating process. The temperature measurement of the system can be divided into two types: beta type thermocouple is used when the temperature is lower than 1600 ℃, and infrared thermometer is used when the temperature is higher than 1600 ℃. The annealing furnace can use different annealing atmosphere and adjust the pressure value. The annealing furnace can achieve a higher vacuum degree by vacuum pumping through mechanical pump and molecular pump.
According to the market demand, Haoyue technology continuously develops and improves technology, introduces heat treatment equipment with excellent performance, and provides corresponding technical support to assist domestic semiconductor market and provide corresponding technical consultation for heat treatment process of semiconductor industry.
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